System-Level Modeling for Digital-twin generation

Speaker
Stefano Spellini - Università di Verona - Dip. Informatica

Date
Jun 22, 2021 - Time: 14:00

This seminar outlines a design flow contemplating the reuse of already  existing manufacturing lines' models, while designing novel advanced production systems. To enable such a flow, we propose a methodology extracting SysML structural diagrams from AutomationML descriptions. Then, we propose to design the system functionalities on top of the produced diagrams.
The models being generated are exploited to automatically extract a digital twin for the production system. Such a digital twin, merged to a simulation environment, is capable of verifying whether production requirements are met and estimating non-functional properties.

Link alla registrazione del workshop:

https://univr.cloud.panopto.eu/Panopto/Pages/Viewer.aspx?id=8bd13881-22e9-48d6-8c09-ad4f00d951d1 
 
Data pubblicazione
May 27, 2021

Contact person
Franco Fummi
Department
Computer Science